Mehrschichtige Leiterplatte mit gefüllten Kontaktlöchern

Carte à circuits imprimés multicouche avec trous d'interconnexion pleins

Multilayer printed wiring board with filled viaholes

Abstract

The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole.

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Patent Citations (4)

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    EP-0743812-A1November 20, 1996Ibiden Co, Ltd.Carte a circuit imprime multicouche et son procede de production
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    JP-H09312472-ADecember 02, 1997Kyocera Corp, 京セラ株式会社多層配線基板及びその製造方法
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NO-Patent Citations (3)

    Title
    PATENT ABSTRACTS OF JAPAN vol. 1996, no. 05 31 May 1996 (1996-05-31)
    PATENT ABSTRACTS OF JAPAN vol. 1997, no. 07 31 July 1997 (1997-07-31)
    PATENT ABSTRACTS OF JAPAN vol. 1998, no. 04 31 March 1998 (1998-03-31)

Cited By (0)

    Publication numberPublication dateAssigneeTitle